Technology for Self-Assembled Entities in Logic and Memory Units below the Lithography Limit

Discrete floating gates, nanocrystals or nitride traps, of Flash memory devices enable aggressive scaling of the tunneling oxide by relieving the total charge loss concern of the continuous floating gate [1]. However, a trade-off between the retention and program/erase (P/E) characteristics still remains. Nanocrystal memories with the direct tunneling oxide can still suffer serious retention degradation. SONOS, on the other hand, needs high operational voltage due to trap distribution. In this study, the heterogeneous stack with metal nanocrystals and nitride is investigated as a promising combination. Semiconductor nanocrystal (Si) and SONOS hybrid memories have been proposed [2, 3]. However, the metal nanocrystals can be more advantageous as the intermediate media and offer larger charge storage capacity and longer retention time than semiconductor counterparts [4]. Summary: The metal nanocrystal/nitride heterogeneous stack floating gate memories were fabricated and characterized. By making the double stack of Si3N4-AuSi3N4-Au, we could enhance the memory characteristics even further. Au nanocrystals were self-assembled after a 1.2 nm thick metal evaporation on top of 2.65 nm tunneling oxide. Then 8.6 nm PECVD nitride and 29.9 nm PECVD oxide depositions were performed. For double stacks, each nanocrystal formation was followed by 4.3 nm nitride deposition. The discrete Au nanocrystal formation was confirmed by SEM observation before capping with additional layers. The cross-sectional TEM images of double heterogeneous stack devices confirm the nanocrystal formation and conformal dielectrics. Electrical characterization by 1MHz C-V measurements demonstrates the advantage of heterogeneous stack memories in comparison to nanocrystal control devices or nitride memories. Devices with Au nanocrystals show the memory windows of 0.89V (nanocrystal), 1.12V (single heterogeneous stack), and 3V (double heterogeneous stack), respectively, while nitride memory Technology for Self-Assembled Entities in Logic and Memory Units below the Lithography Limit CNF Project # 715-98 Principal Investigator(s): Edwin C. Kan (SONOS) requires higher P/E voltages over (10V to give a detectable flat band voltage shift. It proves that Au nanocrystals work as an ideal medium to the nitride traps, and that the double stack is more efficient than the single stack. The additional nanocrystal layer can help the charge transfer to the farther traps from the channel. Retention characteristics manifest the key role of nitride traps. The elevated temperature tests distinguish the characteristics by accelerating the charge loss. Because the elevated temperature can agitate the stored charge in the nanocrystals, the fast collapse of CV curves is observed in the nanocrystalonly device. However, the heterogeneous stack with nitride seems to make the relaxation to the traps and maintain the stored charges for long retention. Endurance tests were performed up to 106 cycles, because direct tunneling mechanism ensures the minimal oxide degradation. The P/E tests show 0.51.5V flat band voltage shift in less than 100 ns, and the charge saturation in less than 10 μsec. The heterogeneous-stack floating gate of metal nanocrystals and nitride has significant advantages in the retention characteristics and low voltage operations. From the comparison of gate stack splits, the roles of nitride traps for longer retention and nanocrystals for low-voltage P/E are demonstrated. References: [1] N. Flaherty, “Not in a flash,” IEE Review, pp. 50-53, Dec. 2003. [2] S. Yamazaki, et al., “Properties of nonvolatile semiconductor memories by using silicon clusters in the gate insulator,” in IEDM Tech. Dig., 1973, pp. 355-358. [3] R. F. Steimle, et al., “Hybrid silicon nanocrystal silicon nitride dynamic random access memory,” IEEE Tran. Nanotech., vol. 2, no. 4, pp. 335-340, Dec. 2003. [4] C. Lee, et al., “Operational and reliability comparison of discrete-storage nonvolatile memories: Advantages of singleand double-layer metal nanocrystals,” in IEDM Tech. Dig., 2003, pp.557-560.